College of Electronics and Information Engineering
Nanjing University of Information Science and Technology
China
Homepage
Belarusian State University of Informatics and Radioelectronics
Belarus
Homepage
Belarusian State University of Informatics and Radioelectronics
Belarus
Homepage
Institut Universitaire de Technologie
University of La Reunion
France
Homepage1. Tun, Leaw Pang and Lim Chee Peng, "Challenges in high density PCB with 0.40 mm pitch BGA --- from design, fabrication & assembly perspective," 2009 1st Asia Symposium on Quality Electronic Design, 44-48, Kuala Lumpur, Malaysia, Jul. 15-16 2009.
2. Rao, G. and N Rao, "A web based course on designing high density interconnect PCBs for manufacturability," 50th Electronic Components & Technology Conference --- 2000 Proceedings, 1285-1288, Las Vegas, Nv, May 21-24 2000.
doi:10.1109/ECTC.2000.853340
3. Frisk, L., S. Lahokallio, and J. Kiilunen, "Comparison of microvia hdi pcbs with ACF interconnections in accelerated life testing," 2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition, 1-6, 2017.
4. Sung, M, W. Ryu, H. Kim, J. Kim, and J. Kim, "An efficient crosstalk parameter extraction method for high-speed interconnection lines," IEEE Transactions on Advanced Packaging, Vol. 23, No. 2, 148-155, May 2000.
doi:10.1109/6040.846625
5. Kim, Dongchul and Yungseon Eo, "S," IEEE Transactions on Advanced Packaging, Vol. 32, No. 1, 152-163, Feb. 2009.
doi:10.1109/TADVP.2008.2004465
6. Fan, Jun, Xiaoning Ye, Jingook Kim, Bruce Archambeault, and Antonio Orlandi, "Signal integrity design for high-speed digital circuits: progress and directions," IEEE Transactions on Electromagnetic Compatibility, Vol. 52, No. 2, 392-400, May 2010.
doi:10.1109/TEMC.2010.2045381
7. Kim, Joungho and Erping Li, "Special issue on PCB level signal integrity, power integrity, and EMC," IEEE Transactions on Electromagnetic Compatibility, Vol. 52, No. 2, 246-247, May 2010.
doi:10.1109/TEMC.2010.2049073
8. Schuster, Christian and Wolfgang Fichtner, "Parasitic modes on printed circuit boards and their effects on EMC and signal integrity," IEEE Transactions on Electromagnetic Compatibility, Vol. 43, No. 4, 416-425, 2001.
9. Archambeault, Bruce, Colin Brench, and Sam Connor, "Review of printed-circuit-board level EMI/EMC issues and tools," IEEE Transactions on Electromagnetic Compatibility, Vol. 52, No. 2, 455-461, May 2010.
doi:10.1109/TEMC.2010.2044182
10. Swirbel, T., A. Naujoks, and M. Watkins, "Electrical design and simulation of high density printed circuit boards," IEEE Transactions on Advanced Packaging, Vol. 22, No. 3, 416-423, Aug. 1999.
doi:10.1109/6040.784495
11. Buckwalter, James F., "Predicting microwave digital signal integrity," IEEE Transactions on Advanced Packaging, Vol. 32, No. 2, 280-289, May 2009.
doi:10.1109/TADVP.2008.2011560
12. Wan, Fayu, Taochen Gu, Sebastien Lallechere, Jamel Nebhen, and Blaise Ravelo, "NGD investigation on medusa-shape interconnect structure," International Journal of RF and Microwave Computer-aided Engineering, Vol. 31, No. 10, Oct. 2021.
doi:10.1002/mmce.22846
13. Ansys SI, 4 pages, [Online] Cited 2021-5-10, available at: https://www.ansys.com/products/electronics/option-ansys-si.
14. Ansys CST Studio Suite SI and PI, 1 page, [Online] Cited 2021-6-15, available at: https://www.3ds.com/productsservices/ simulia/training/course-descriptions/cst-studio-suite-edasi-pi/.
15. Ruehli, Albert E and Andreas C. Cangellaris, "Progress in the methodologies for the electrical modeling of interconnects and electronic packages," Proceedings of the IEEE, Vol. 89, No. 5, 740-771, 2001.
16. Khan, Zulfiqar A., "A novel transmission line structure for high-speed high-density copper interconnects," IEEE Transactions on Components Packaging and Manufacturing Technology, Vol. 6, No. 7, 1079-1088, Jul. 2016.
doi:10.1109/TCPMT.2016.2570207
17. Branch, K. M. C., J. Morsey, A. C. Cangellaris, and A. E. Ruehli, "Physically consistent transmission line models for high-speed interconnects in lossy dielectrics," IEEE Transactions on Advanced Packaging, Vol. 25, No. 2, 129-135, May 2002.
doi:10.1109/TADVP.2002.803309
18. Ravelo, B., "Delay modeling of high-speed distributed interconnect for the signal integrity prediction," European Physical Journal-applied Physics, Vol. 57, No. 3, Feb. 2012.
doi:10.1051/epjap/2012110374
19. Kahng, Andrew B. and Sudhakar Muddu, "An analytical delay model for RLC interconnects," IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems, Vol. 16, No. 12, 1507-1514, 1997.
20. Venkatesan, R., J. A. Davis, and J. D. Meindl, "Compact distributed rlc interconnect models --- part IV: unified models for time delay, crosstalk, and repeater insertion," IEEE Transactions on Electron Devices, Vol. 50, No. 4, 1094-1102, Apr. 2003.
doi:10.1109/TED.2003.812509
21. Roy, Sourajeet and Anestis Dounavis, "Efficient delay and crosstalk modeling of RLC interconnects using delay algebraic equations," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 19, No. 2, 342-346, Feb. 2011.
doi:10.1109/TVLSI.2009.2032288
22. Wang, S. L. and T. W. Chang, "Delay modeling for buffered RLY/RLC trees," 2005 IEEE VLSI-TSA International Symposium on Vlsi Design, Automation & Test (VLSI-TSA-DAT), Proceedings of Technical Papers, 237-240, Automation and Test, Hsinchu, Apr. 27-29, 2005.
doi:10.1109/VDAT.2005.1500064
23. Choi, Minsoo, Jae-Yoon Sim, Hong-June Park, and Byungsub Kim, "An approximate closed-form transfer function model for diverse differential interconnects," IEEE Transactions on Circuits and Systems I-regular Papers, Vol. 62, No. 5, 1335-1344, May 2015.
doi:10.1109/TCSI.2015.2407435
24. Eudes, Thomas, Blaise Ravelo, and Anne Louis, "Experimental validations of a simple pcb interconnect model for high-rate signal integrity," IEEE Transactions on Electromagnetic Compatibility, Vol. 54, No. 2, 397-404, Apr. 2012.
doi:10.1109/TEMC.2011.2165216
25. Maza, Manuel Salim and Monico Linares Aranda, "Analysis of clock distribution networks in the presence of crosstalk and groundbounce," ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (CAT. No. 01ex483), Vol. 2, 773-776, 2001.
26. Ngoho, Samuel, Y. C. Mombo Boussougou, Syed S. Yazdani, Yuandan Dong, Nour M. Murad, and Lalléchère, "Design and modelling of ladder-shape topology generating bandpass NGD function," IEEE Transactions on Electromagnetic Compatibility, Vol. 62, No. 5, 1813-1821, 2020.
doi:10.1109/TEMC.2019.2936266
27. Wan, Fayu, Lili Wu, Blaise Ravelo, and Junxiang Ge, "Analysis of interconnect line coupled with a radial-stub terminated negative group delay circuit," IEEE Transactions on Electromagnetic Compatibility, Vol. 62, No. 5, 1813-1821, Oct. 2020.
doi:10.1109/TEMC.2019.2936266
28. Boussougou, Yves C. Mombo, Eric J. R. Sambatra, Antonio Jaomiary, Lucius Ramifidisoa, Nour M Murad, Jean-Paterne Kouadio, Samuel Ngoho, Frank E. Sahoa, Sahbi Baccar, and Rivo Randriatsiferana, "Bandpass-type NDG design engineering and uncertainty analysis of RLC-series resonator based passive cell," Progress In Electromagnetics Research C, Vol. 121, 65-82, 2022.
29. Das, Ranjan, Qingfeng Zhang, and Haiwen Liu, "Lossy coupling matrix synthesis approach for the realization of negative group delay response," IEEE Access, Vol. 6, 1916-1926, 2018.
doi:10.1109/ACCESS.2017.2780888
30. Wang, Zhongbao, Yuan Cao, Te Shao, Shaojun Fang, and Yuanan Liu, "A negative group delay microwave circuit based on signal interference techniques," IEEE Microwave and Wireless Components Letters, Vol. 28, No. 4, 290-292, Apr. 2018.
doi:10.1109/LMWC.2018.2811254
31. Xiao, Jian-Kang, Qiu-Fen Wang, and Jian-Guo Ma, "Negative group delay circuits and applications: Feedforward amplifiers, phased-array antennas, constant phase shifters, non-foster elements, interconnection equalization, and power dividers," IEEE Microwave Magazine, Vol. 22, No. 2, 16-32, 2021.
32. Ravelo, Blaise, "Distributed NDG active circuit for RF-microwave communication," AEU-international Journal of Electronics and Communications, Vol. 68, No. 4, 282-290, 2014.
doi:10.1016/j.aeue.2013.09.003
33. Shao, Te, Zhongbao Wang, Shaojun Fang, Hongmei Liu, and Zhi Ning Chen, "A group-delay-compensation admittance inverter for full-passband self-equalization of linear-phase band-pass filter," AEU-international Journal of Electronics and Communications, Vol. 123, Aug. 2020.
doi:10.1016/j.aeue.2020.153297
34. Ravelo, Blaise, Fayu Wan, Jamel Nebhen, Wenceslas Rahajandraibe, and Sebastien Lallechere, "Resonance effect reduction with bandpass negative group delay fully passive function," IEEE Transactions on Circuits and Systems Ii-express Briefs, Vol. 68, No. 7, 2364-2368, Jul. 2021.
doi:10.1109/TCSII.2021.3059813
35. Ravelo, Blaise, Sebastien Lallechere, Wenceslas Rahajandraibe, and Fayu Wan, "Electromagnetic cavity resonance equalization with bandpass negative group delay," IEEE Transactions on Electromagnetic Compatibility, Vol. 63, No. 4, 1248-1257, Aug. 2021.
doi:10.1109/TEMC.2021.3051100
36. Ravelo, B., S. Lallechere, A. Thakur, A. Saini, and P. Thakur, "Theory and circuit modeling of baseband and modulated signal delay compensations with low- and band-pass NDG effects," AEU-international Journal of Electronics and Communications, Vol. 70, No. 9, 1122-1127, 2016.
doi:10.1016/j.aeue.2016.05.009
37. Gu, Taochen, Xiaoyu Huang, Fayu Wan, Blaise Ravelo, and Qizheng Ji, "Coupled-line curvature angle effect on bandpass negative group delay characteristics," 2022 Asia-pacific International Symposium on Electromagnetic Compatibility (APEMC), 458-461, 2022.
38. Ravelo, Blaise, Lili Wu, Fayu Wan, Wenceslas Rahajandraibe, and Nour Mohammad Murad, "Negative group delay theory on li topology," IEEE Access, Vol. 8, 47596-47606, 2020.
doi:10.1109/ACCESS.2020.2979453
