volume | PIER Journals

Abstract

The reliability of circuits on printed circuit boards (PCBs) in many modern electronic products is affected by severe noise caused by high-speed and low-voltage operation as well as layout constraints compounded by limited space and high circuit density. Crosstalk is a major noise source that interferes with the signal integrity (SI) in poor PCB layout designs. One common method of reducing crosstalk is the three-width (3-W) rule. The serpentine guard trace (SGT) approach has also been used to reduce crosstalk using two terminal matching resistors on the SGT between the aggressor and victim. Although the SGT approach suppresses far-end crosstalk (FEXT) at the expense of more layout space, it also neglects interference caused by near-end crosstalk (NEXT). In this study, we propose the SGT via (SGTV) approach in which grounded vias are added to the SGT at appropriate locations, and the ratio between the lengths of the horizontal and vertical sections of the guard trace is adjusted to minimize NEXT and FEXT. Frequency domain simulated (measured) results showed that the SGTV approach reduced NEXT by 3.7 (7.65) and 0.83 (1.6) dB as well as FEXT by 5.11 (7.22) and 0.1 (1.98) dB compared to the 3-W and SGT approaches, respectively. In the time domain, simulated (measured) results showed that SGTV reduced NEXT by 34.67% (49.8%) and 27.5% (26.65%) as well as FEXT by 46.78% (56.52%) and 6.91% (24.8%) compared to the 3-W and SGT approaches, respectively. Our proposed approach thus effectively suppresses both NEXT and FEXT to achieve better SI in PCB layout designs than the other two methods. As our design uses two grounded vias instead of two guard trace terminators and does not require extra components, it is less costly than SGT. Our simulated and measured results indicate that our approach is suitable for practical application because of the lower cost and the ease of implementation that eliminates NEXT and FEXT.

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Prof. Wen-Tzeng Huang

Dr. Chi-Hao Lu

Prof. Ding-Bing Lin