volume | PIER Journals

Abstract

This paper presents the design of a planar tunable Negative Group Delay (NGD) circuit with low reflections. A pulse-shaped stub inscription on the signal strip of a microstrip line generates a negative group delay, which can then be tuned to a desired value by varying the resistance inside the inscription. Poor reflection characteristics are inherent in such circuits, and a conventional solution like a simple impedance matching circuit compromises the overall NGD performance for a reduced reflection loss. Here, we have included a novel impedance-matching network loaded with absorptive elements at the input/output ports to avoid any reflections from the circuit, while maintaining its NGD behavior and compactness. The measured results validate the proposed design with -5 ns GD at 3 GHz with less than -10 dB reflection loss over the whole NGD bandwidth of 228 MHz at 3 GHz.

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Mrs. Chithra Liz Palson

Dr. Deepti Das Krishna

Dr. Babita Roslind Jose