volume | PIER Journals

Abstract

A simple and nonlinear LDMOS transistor model with multi-bias consideration has been proposed. Elements of the model are optimizes using particle swarm optimization (PSO) algorithm to fit the measured RF specifications of a typical transistor. The developed model is used then to design a high efficiency power amplifier with 55% power added efficiency (PAE) at 33 dBm output power with 12 dB power gain. This amplifier has a novel topology with optimized BALUN and microstrip matching network which makes it unconditionally stable and extensively linear over UHF frequency range of 100 MHz to 1 GHz with 163% fractional bandwidth. This power amplifier is fabricated and realized with 12-V supply voltage. A good agreement between simulated and measured values observed, indicating high accuracy of either the model and the amplifier design approach.

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Dr. Mohammad Jahanbakht

Mr. Mohammad Tondro.Aghmyoni