An integer-N quadrature frequency synthesizer for single-band UWB application was designed in 0.18 μm CMOS technology. A modified bottom-series quadrature voltage-controlled oscillator (QVCO) based on reconfigurable LC tank is employed to provide quadrature signals and cover a range from 6.48 GHz to 7.07 GHz. In order to suppress the reference spur levels, an improved charge-averaging charge pump and a highly linear phase-frequency detector (PFD) are used. From the carrier of 6.6 GHz, the measured reference spur is -78.2 dBc, and the measured phase noise is -115.4 dBc/Hz at 1MHz offset. The frequency synthesizer including buffers consumes a total power of 99 mW from a 1.8 V power supply. Chip size is 1.6 mm×0.9 mm.
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