This paper describes a high-gain CMOS low-noise amplifier (LNA) for 2.4/5.2-GHz WLAN applications. The cascode LNA uses an inductor at the common-gate transistor to increase its transconductance equivalently, and therefore it enhances the gain effectively with no additional power consumption. The LNA is matched concurrently at the two frequency bands, and the input/output matching networks are designed with two notch frequencies to shape the frequency response. The dual-band LNA with the common-gate inductor is designed, implemented, and verified in a standard 0.18-μm CMOS process. The fabricated LNA which consumes 7.2 mW features gains of 14.2 dB and 14.6 dB, and noise figures of 4.4 dB and 3.7 dB at the 2.4-GHz and 5.2-GHz frequency bands, respectively. The proposed LNA demonstrates a 4.9-7.8 dB gain enhancement compared to conventional cascode LNAs, and the chip size is 1.06 mm × 0.79 mm including all testing pads.
2. Hsiao, C.-L. and Y.-L. Huang, "A low supply voltage dualband low noise amplifier design," 13th IEEE Int. Symp. on Consumer Electronics, 339-341, May 2009.
3. Datta, S., K. Datta, A. Dutta, and T. K. Bhattacharyya, "Fully concurrent dual-band LNA operating in 900 MHz/2.4 GHz bands for multi-standard wireless receiver with sub-2 dB noise figure," 3rd Int. Conf. on Emerging Trends in Engineering and Technology, 731-734, Nov. 2010.
4. Dutta, A., K. Dasgupta, and T. K. Bhattacharyya, "Parasitica-ware robust concurrent dual-band matching network for a packaged LNA," IET Microw. Antennas & Propag., Vol. 3, No. 7, 1094-1101, Jul. 2009.
5. Tham, J., M. Margrait, B. Pregardier, C. Hull, R. Magoon, and F. Carr, "A 2.7V 900-MHz dual-band transceiver IC for digital wireless communication," IEEE J. Solid-State Circuits, Vol. 34, No. 3, 286-291, Mar. 1999.
6. Wu, S. and B. Razavi, "A 900-MHz/1.8-GHz CMOS receiver for dual-band applications," IEEE J. Solid-State Circuits, Vol. 33, No. 12, 2178-2185, Dec. 1998.
7. Ryynanen, J., K. Kivekas, J. Jussila, and K. Halonen, "A dual-band RF front-end for WCDMA and GSM applications," IEEE J. Solid-State Circuits, Vol. 36, No. 3, 1198-1204, Mar. 2001.
8. Li, Z., R. Quintal, and K. K. O, "A dual-band CMOS front-end with two gain modes for wireless LAN applications," IEEE J. Solid-State Circuits, Vol. 39, No. 11, 2069-2073, Nov. 2004.
9. Lu, L. H., H.-H. Hsieh, and Y.-S. Wang, "A compact 2.4/5.2-GHz CMOS dual-band low-noise amplifier," IEEE Microw. and Wireless Compon. Lett., Vol. 15, No. 10, 685-687, Oct. 2005.
10. Vidojkovic, V., J. van der Tang, E. Hanssen, A. Leeuwenburgh, and A. van Roermund, Fully-integrated DECT/Bluetooth multiband LNA in 0.18 μm CMOS, Proc. IEEE Int. Symp. Circuits Systems, Vol. 1, I-565-I-568, 2004.
11. Li, Z., R. Quintal, and K. K. O, "A dual-band CMOS front-end with two gain modes for wireless LAN applications," IEEE J. Solid-State Circuits, Vol. 39, No. 11, 2069-2073, Nov. 2004.
12. Zhao, G., F.-S. Zhang, Y. Song, Z.-B. Weng, and Y.-C. Jiao, "Compact ring monopole antenna with double meander lines for 2.4/5 GHz dual-band operation," Progress In Electromagnetics Research, Vol. 72, 187-194, 2007.
13. Ren, W., "Compact dual-band slot antenna for 2.4/5 GHz WLAN applications," Progress In Electromagnetics Research B, Vol. 8, 319-327, 2008.
14. Wu, G.-L., W. Mu, X.-W. Dai, and Y.-C. Jiao, "Design of novel dual-band bandpass filter with microstrip meander-loop resonator and CSRR DGS," Progress In Electromagnetics Research, Vol. 78, 17-24, 2008.
15. Pan, S. J., L. W. Li, and W. Y. Yin, "Performance trends of on-chip spiral inductors for RFICs," Progress In Electromagnetics Research, Vol. 45, 123-151, 2004.
16. Jhon, H.-S., I. Song, J. Jeon, H. Jung, M. Koo, B.-G. Park, J. D. Lee, and H. Shin, "8mW 17/24 GHz dual-band CMOS low-noise amplifier for ISM-band application," Electronics Letters, Vol. 44, No. 23, 1353-1354, Nov. 2008.
17. Hashemi, H. and A. Hajimiri, "Concurrent multiband low-noise amplifiers --- Theory, design, and applications," IEEE Trans. Microw. Theory Tech., Vol. 50, No. 1, 288-301, Jan. 2002.
18. Wong, S.-K., F. Kung, S. Maisurah, M. N. B. Osman, and S. J. Hui, "Design of 3 to 5 GHz CMOS low noise amplifier for ultra-wideband (UWB) system," Progress In Electromagnetics Research C, Vol. 9, 25-34, 2009.
19. Dorafshan, A. and M. Soleimani, "High-gain CMOS low noise amplifier for ultra wide-band wireless receiver," Progress In Electromagnetics Research C, Vol. 7, 183-191, 2009.
20. Hsieh, H.-H. and L.-H. Lu, "A 40 GHz low-noise amplifier with a positive-feedback network in 0.18-μm CMOS," IEEE Trans. Microwave Theory Tech., Vol. 57, No. 8, 1895-1902, Aug. 2009.
21. Cassan, D. J. and J. R. Long, "A 1-V transformer-feedback low-noise amplifier for 5-GHz wireless LAN in 0.18-μm CMOS," IEEE J. Solid-State Circuits, Vol. 38, No. 3, 427-435, Mar. 2003.
22. Lee, T. H., The Design of CMOS Radio-Frequency Integrated Circuits, Cambridge Univ. Press, Cambridge, UK, 1998.
23. Nguyen, T.-K., C.-H. Kim, G.-J. Ihm, M.-S. Yang, and S.-G. Lee, "CMOS low-noise amplifier design optimization techniques," IEEE Trans. Microwave Theory Tech., Vol. 52, No. 3, 1433-1442, May 2004.
24. Yoon, J., H. Seo, I. Choi, and B. Kim, "Wideband LNA using a negative gm cell for improvement of linearity and noise figure," Journal of Electromagnetic Waves and Applications, Vol. 24, No. 5-6, 619-630, 2010.
25. Zhang, J., J.-Z. Gu, B. Cui, and X.-W. Sun, "Compact and harmonic suppression open-loop resonator bandpass filter with harmonic suppression tri-section SIR," Progress In Electromagnetics Research, Vol. 69, 93-100, 2007.
26. Linten, D., L. Aspemyr, W. Jeamsaksiri, J. Ramos, A. Mercha, S. Jenei, S. Thijs, R. Garcia, H. Jacobsson, P. Wambacq, S. Donnay, and S. Decouter, "Low-power 5 GHz LNA and VCO in 90nm RF CMOS," IEEE Symp. VLSI Circuits Dig. Tech. Papers, 372-375, Jun. 2004.